PCB fabrication turns controlled design data into a bare board with copper conductors, insulating layers, plated connections and protected surfaces. The board provides electrical interconnections and mechanical support; the mounted components and circuit design determine how the finished product behaves. Fabrication is distinct from assembly, where components are fitted and soldered.
This guide follows a common subtractive process for a rigid multilayer board with plated through-holes. It is not a universal factory recipe: double-sided boards omit inner-layer lamination, and HDI, flex, rigid-flex and specialty materials introduce different operations. The fabricator selects a qualified route for the agreed construction.
1. Release the design and manufacturing files#
Complete the schematic, layout and design-rule checks, then export the package accepted by the manufacturer. Gerber describes layer images; drill data, the board outline, stack-up and fabrication notes complete the manufacturing instructions. Modern Gerber supports attributes that help identify layer and feature functions. The historical name is RS-274X, not “IX274X”.
Inspect the actual exported files, not only the CAD view. Check layer order, units, polarity, outline closure, plated and non-plated holes, copper-to-edge clearances and revision identifiers. Include an independent CAD netlist where supported so the factory can compare the intended connectivity with the manufacturing data. Native CAD software versions matter if native files are requested, but are not a universal prerequisite for standardized fabrication files.
2. Perform CAM and manufacturability review#
The manufacturer checks the files against its process capabilities and prepares production data. This can include panel layout, tooling features, coupons and compensation for predictable fabrication effects. Questions about minimum spacing, annular rings, slots, mask webs or material availability should be resolved before release.
Agree any change that affects the delivered design. A DFM check does not establish that the circuit will function, and it does not replace the designer’s electrical or mechanical validation. Confirm the material grade, final thickness, copper requirements, finish, acceptance criteria and test scope in the order.
3. Prepare the laminate and image the inner layers#
A conventional FR-4 multilayer commonly uses copper-clad glass-reinforced epoxy cores, prepreg bonding sheets and copper foil. Other applications may require different resin systems or substrate materials. The selected material must match the approved stack-up, processing conditions and electrical requirements.
The core copper is cleaned and coated with a light-sensitive resist. The circuit pattern is exposed through a phototool or written by direct imaging; film is not required in every factory. Exposure and development leave a resist image that defines which copper will remain during etching. Cleanliness, alignment and exposure control help prevent defects before they become buried inside the board.
4. Etch the inner-layer copper#
In the common negative-resist inner-layer route, developed resist protects the intended conductors while etchant removes exposed copper. The protective resist is stripped after etching. This order matters: removing all resist before etching would also expose the copper that must remain.
Etching must control both depth and lateral removal. Copper thickness therefore influences achievable track and gap geometry. Heavier copper cannot simply be substituted into a fine-line design without reviewing the manufacturing rules. The resulting layer is cleaned and checked for residual copper, damaged conductors and remaining resist.
5. Inspect and register the inner layers#
Automated optical inspection compares the manufactured copper pattern with the prepared reference data to identify possible opens, shorts and geometry defects. Suspect features require review rather than automatic acceptance or rejection without context. Registration features establish how the inner layers will align with one another and with later drilling.
Inner-layer inspection occurs before lamination because access becomes much more difficult once the layers are bonded. Inspection records, traceability and any permitted repair procedures should follow the agreed quality plan. Optical inspection alone does not prove dielectric integrity or final board reliability.
6. Lay up and laminate the multilayer#
The prepared cores, prepreg and outer copper foil are arranged in the approved layer order. During a controlled press cycle, heat and pressure allow the resin to flow and cure, bonding the construction. Registration systems keep the patterns aligned while the process controls resin flow, consolidation and cooling.
The stack-up is an engineered combination of materials, not an arbitrary pile of sheets. Resin content, copper distribution, dielectric thickness and the press process affect the final geometry. Discuss controlled impedance and thickness tolerances before manufacture; changing a dielectric layer later may require a new electrical assessment.
7. Drill the required holes#
Mechanical drilling forms through-holes and other features according to the drill files and production route. Entry and backing materials support drilling, and registration equipment relates hole positions to the internal copper. Drill diameter, speed and tool life depend on material, hole size, panel thickness and process capability; there is no single spindle speed or minimum hole size for every PCB.
Differentiate drilled diameter from finished plated-hole diameter. Plating reduces the opening, so the fabricator selects the tool and process allowance needed to meet the finished requirement. Microvias may use laser drilling, and blind or buried structures can require drilling and plating at intermediate stages. Non-plated holes must remain electrically separate from plated features as specified.
8. Prepare and metallize the hole walls#
Drilling can leave resin smear and debris that interfere with connections to inner-layer copper. Cleaning and desmear prepare the walls for metallization. Depending on the qualified process, an electroless copper deposit or a direct-metallization treatment makes the insulating surfaces conductive for subsequent electroplating.
This operation creates a conductive foundation; it does not mechanically fuse the already laminated layers. Hole-wall preparation and copper buildup determine the integrity of the interlayer connection. Aspect ratio and chemistry affect coverage, so the required hole structure must be compatible with the manufacturer’s process.
9. Image the outer-layer pattern#
In a common pattern-plating route, photoresist is applied, imaged and developed on the outer surfaces. Openings expose the tracks, pads and plated-hole locations that will receive additional metal. The resist protects areas where plating is not wanted.
Phototools or direct imaging may be used. The image tone and exposure sequence depend on the resist and process, so a universal rule that black always means copper is misleading. The engineering goal is correctly registered openings and a clean surface for controlled deposition.
10. Build the copper and apply an etch resist#
Electroplating builds copper on exposed outer-layer features and inside the plated holes. In the conventional tin-protected process, a thin tin layer is then added over the intended copper pattern to protect it during the following etch.
Starting copper foil and finished copper are different quantities. Outer-layer copper includes deposited metal, while the finished hole-wall copper has its own acceptance requirement. Copper distribution and plating conditions affect thickness uniformity. The purchase specification should make clear which finished values matter and how they will be verified.
11. Remove unwanted outer-layer copper#
The plating resist is stripped to expose the unwanted base copper. Etching removes that copper while the tin protects the required conductors. The temporary tin coating is then removed, leaving the intended outer pattern. Other qualified fabrication routes may use a different sequence.
Check conductor geometry and isolation after processing. A clean-looking surface is not enough to establish that all buried connections are sound. Optical, electrical and construction-specific checks provide different evidence and should be considered together.
12. Apply and cure solder mask#
Solder mask covers selected areas of the board while leaving assembly pads and specified openings exposed. A photoimageable mask is coated, exposed, developed and cured according to its process. Imaging may use a phototool or direct exposure.
Important checks include alignment, adhesion, coverage and clean pad openings. Narrow mask dams must be compatible with the chosen process and color. Solder mask is not a replacement for the required copper spacing, and a tented via should not be assumed to be resin-filled or hermetically sealed.
13. Add the specified surface finish#
The surface finish protects exposed copper and supports the intended assembly or contact function. Options can include HASL, ENIG, immersion silver, immersion tin or OSP, with other finishes used for specific applications. ENIG is a nickel-and-gold system, not simply a generic gold coating.
Choose the finish for component geometry, storage, soldering cycles, contact needs and reliability requirements. HASL and flat chemical finishes have different characteristics; no finish is universally best. The relative order of finishing and other final operations can vary with the production route.
14. Print the legend and finish mechanical features#
Reference designators, polarity marks and identification are applied by screen printing or digital printing and cured as required. Keep legend clear of exposed pads and make the text readable at the released size. Manufacturing marks and traceability codes should follow the order requirements.
Routing defines the outline and cutouts. A delivered panel may retain breakaway tabs, while V-scoring forms grooves on compatible straight separation lines. Specify panel rails, tabs and score details with assembly needs in mind. Profiling and electrical test may occur in different orders depending on handling and fixture requirements.
15. Electrically test and inspect the bare board#
Bare-board electrical testing checks continuity and isolation against the agreed reference netlist and limits. Flying probes and fixtures are alternative ways of accessing the nets. A test derived only from the same erroneous fabrication data may miss the original export error, which is why an independent CAD netlist is useful.
This test does not establish the function of a future assembled product. Additional requirements may include impedance coupons, microsections, dimensional checks or other inspection records. Define the required evidence before production rather than requesting unavailable data after shipment. Our PCB testing guide explains the different test purposes.
16. Package and hand over to assembly#
Final checks confirm the revision, quantity, outline, finish, marking and agreed records. Packaging should protect the boards from handling damage, contamination and moisture according to the finish and storage requirements. Receiving teams should preserve identification and follow the supplier’s handling instructions.
For assembly, provide the approved BOM, placement coordinates, assembly drawings and programming or functional-test instructions. A correct bare board is only one part of a successful PCBA. PCBPit’s assembly service can be scoped alongside the PCB manufacturing requirements so the handover is defined before production.
Before you release the order#
- Keep all exported files and drawings on one approved revision.
- Confirm materials, stack-up, finished copper, holes, finish and tolerances.
- Resolve DFM questions and approve any design-affecting changes.
- Specify electrical-test limits and any additional inspection records.
- Check the final layer set with the online Gerber viewer.
- Agree the assembly handover, packaging and delivery requirements.
Technical references#
- Ucamco Gerber specifications and fabrication-data resources
- Eurocircuits PCB manufacturing technology
- Eurocircuits outer-layer etching sequence
- Multi Circuit Boards explanation of lamination
- Bay Area Circuits bare-board electrical testing and netlists
Frequently asked questions#
Is PCB fabrication the same as PCB assembly?
No. Fabrication makes the bare interconnect board. Assembly places and solders components, with programming and functional tests added according to the agreed scope.
Does every PCB use photographic film?
No. Phototools are one imaging method; direct imaging writes the required pattern without a separate film. The suitable route depends on the process and design.
Why are inner layers inspected before lamination?
Once bonded inside the stack, those patterns are no longer directly accessible. Inspecting beforehand helps identify defects before further value is added.
Does an electrical-test pass prove that my product will work?
No. Bare-board testing verifies specified continuity and isolation. Circuit behavior, component assembly, firmware and operation under real loads require separate validation.